Description
The AMD EPYC 9255 is a 24-core / 48-thread server processor in the AMD EPYC 9005 Series (5th Gen EPYC), built on the SP5 platform with a 4.3 GHz max boost clock, 128 MB of L3 cache and a 200W default TDP. It supports 12-channel DDR5 memory and PCIe® 5.0 x128 connectivity.
Specifications
| CPU Cores | 24 |
|---|---|
| Threads | 48 |
| Base Clock | 3.2 GHz |
| Max Boost Clock | 4.3 GHz |
| L3 Cache | 128 MB |
| Default TDP | 200W |
| Configurable TDP | 200-240W |
| Platform | SP5 |
| Socket Count | 1P / 2P |
| PCI Express | PCIe® 5.0 x128 |
| Memory Type | DDR5 |
| Memory Channels | 12 |
| Memory Speed | 6400 MT/s |
| Per-Socket Memory Bandwidth | 614 GB/s |
| Tray Part Number | 100-000000694 |
Platform & compatibility
- Socket: SP5 · 1P / 2P
- Note: Socket SP5 — the same platform as EPYC 9004 (Genoa), so existing SP5 motherboards and chassis can be reused, subject to a BIOS update from the board vendor.
- Memory: 12 channels of DDR5, 6400 MT/s, up to 614 GB/s per socket.
- PCIe: PCIe® 5.0 x128.
Ordering
Tray part number: 100-000000694. Pricing, lead time and system-integration options are available on request — use the Request a Quote button to send us your configuration.
